In this paper, a 7-Level Diode Clamped MultiLevel Inverter (DCMLI) is simulated with three different carrier PWM techniques. Here, Carrier based Sinusoidal pulse width modulation (SPWM), Third Harmonic Injected pulse width modulation (THIPWM) and Modified Carrier-Based Space Vector pulse width modulation (SVPWM) are used as modulation strategies. These modulation strategies include Phase Disposition technique (PD), Phase Opposition Disposition technique (POD), and Alternate Phase Opposition Disposition technique (APOD). In all the modulation strategies, triangular carrier and trapezoidal triangular carrier signals are compared with reference signal, then control pulses are generated. The detailed analysis of the results has been presented and compared with experimental results in terms of fundamental component of output voltage and percent of THD.

This study introduces a new approach to pulse width modulation (PWM) known as the adapted DC Level shift PWM technique (DC-PWM), which is applied to a nine Level modular multiLevel converter. This modulation technique involves interleaving the modulated waveform with a Direct Current (DC) Level, while ensuring that quarter wave symmetry is preserved. By implementing an adjusted Level shift 1/4 DC-phase disposition (PD) PWM and 2/4 DC PDPWM modulation technique, the switching frequency of the Nine Level Modular MultiLevel Converter (MMC) has been successfully reduced. The technique's effectiveness has been confirmed through validation using Simulink/MATLAB and an experimental setup. The simulation results show a notable decrease in the frequency of action switching. When it comes to harmonic performance for phase voltage, line voltage, and capacitor voltage, the Type-3 1/4 DC-PDPWM technique generally outperforms the 2/4 DC-PDPWM technique. The 2/4 DC-PDPWM Type-2 demonstrates impressive performance, particularly in terms of phase current and capacitor voltage %THD. The selection of these techniques will be determined by the specific performance needs and the trade-offs in complexity and harmonic suppression that are deemed acceptable for the intended use.

In this paper, the performance of a single-axis attitude control with pulse-width pulse-frequency (PWPF) modulation is enhanced using a Modified proportional-integral-derivative (PID) controller for arigid satellite with on-off thruster actuators. For this purpose, the well-known observer-based PIDapproach is utilized. The on-off thruster actuator is modeled with a constant delay followed by asecond-order binomial transfer function. The modulator update frequency is limited to 40 Hz as an inputto the on-off thruster actuators. In this study, the design criteria of pointing accuracy, overshoot of theattitude response, fuel consumption, and the number of thruster firings are considered for a step externaldisturbance (with different values). The parameters of the observer-based PID controller are tuned using parametric search method. Simulation results show that the fuel consumption and settling time of theobserver-based approach are considerably decreased with respect to those of PID controller with PWPFmodulator. Moreover, the overshoot of the observer-based approach is omitted. Finally, the robustnessof the observer-based Modified PID controller is investigated in presence of uncertainties in satellitemoment of inertia and thrust Level of on-off actuators.

Abstract- The space vector pulse-width modulation (SVPWM) is a simple and suitable method for voltage control of three-phase two-Level voltage source inverters (VSI)s. However, there are plenty of methods to improve the two-Level VSIs performance by adding virtual vectors or sub-sectors to the SVPWM diagram which cause complexity in implementation of SVPWM for VSIs similar to multiLevel inverters. Operation in overmodulation mode is the other reason for complexity in conventional SVPWM. This paper proposes a novel modulation method, named as Level vector pulse-width modulation (LVPWM), for voltage control of VSIs. The concept of the proposed method is similar to SVPWM but with different vector diagram and dwell times calculations. Unlike the SVPWM, the α and β axes and also their variables are considered separately without gathering in complex variables. The vector diagram has two separated α and β axes each of which contains individual switching vectors and reference vectors. The selection of the vectors to synthesize the reference vectors depends on only the amplitudes of the reference vectors. With lower computational overhead and easy and continuous extension to overmodulation region, the proposed method is a simple solution to the mentioned problems. Simulation and experimental results and harmonics analysis verify the effectiveness of the proposed algorithm.

Renewable energy sources, such as photovoltaic (PV) and fuel cells, have been given attention during the latest decades due to the limitations of non-renewable sources. Therefore, it is essential to improve the structure of voltage source inverters (VSIs) to increase their voltage gain in these applications. The split-source inverter (SSI) is a single-stage topology that uses the same number of power switches and switching states as VSI with boosting capability and the continuous input current. Three-phase switched-inductor SSI (SI-SSI) consists of two equal inductors, six diodes, one capacitor, and the bridge structure. This topology increases the voltage gain of conventional SSI. On the other hand, the modulation scheme impacts the inverters' performance. Space vector pulse width modulation (SVPWM) operates more efficiently than the third-harmonic injection pulse width modulation (THIPWM) and sinusoidal pulse width modulation (SPWM). However, varying the duty cycle of charging the inductors in each switching cycle increases the low-frequency ripples on the DC side of the inverter. To overcome the mentioned drawback in SVPWM, the Modified SVPWM has been proposed. In the Modified SVPWM, the interval corresponding to zero states is redistributed to charge both inductors of SI-SSI with similar constant duty cycles. Thus, the low-frequency components on the inductors' current and capacitor voltage are decreased without affecting the active states. The operation of three-phase SI-SSI with SPWM, THIPWM, traditional SVPWM, and Modified SVPWM is investigated and simulated by MATLAB/Simulink.

The conventional space vector pulse-width modulation (SVPWM) for cascaded H-bridge inverters (CHBIs) has problems of computational complexity and memory requirements. Operation in overmodulation mode is the other reason for the complexity in SVPWM. This paper proposes a novel modulation method, named as Level vector pulse-width modulation (LVPWM), for voltage control of CHBIs. The concept of the proposed method is similar to the SVPWM but with different vector diagram and dwell times calculations. Unlike the SVPWM, the α and β axes and also their variables are considered separately without gathering in complex variables. The vector diagram has two separated α and β axes each of which contains individual switching vectors and reference vectors. The selection of the vectors to synthesize the reference vectors depends only on the amplitudes of the reference vectors. The computational overhead and memory requirement are independent of the number of cascaded H-bridges. Lower computational overhead and easy and continuous extension to overmodulation region are the advantages of the proposed method compared with the SVPWM-based methods. Moreover, the switching algorithm achieves improved efficiency for the inverter. Simulation and experimental results verify the effectiveness of the proposed algorithm.

This paper proposes a novel multiLevel capacitor switched inverter with the capability of self-voltage balancing and step-up features. In order to obtain a 13-Level voltage staircase on the load, thirteen IGBT switches, three capacitors, and only one DC bus as the input voltage source have been used within the suggested topology. Thanks to not using a back-end H-bridge unit in the proposed topology, the voltage stress across the switches is low, and the total standing voltage (TSV) is restricted to 35Vdc. The achieved voltage gain of the introduced inverter is equal to six which makes it suitable for low boost factor converters such as photovoltaic systems. The proposed topology is comparable with other structures with respect to such features as maximum blocking voltage (MBV), cost function (CF),  and number of devices being used. The most important advantage of the proposed 13-Level inverter is that the CF indicator is lower than other traditional configurations. The capacitors are inherently balanced without any extra complex circuits under the Multi-Carrier pulse width modulation (MCPWM) switching technique. To evaluate the suggested topology, multiple simulations as well as experiments have been carried out using MATLAB software and Arduino Due-based ARM cortex-M3 core, respectively, under different modulation indices and resistive-inductive load conditions.

The Functional Electrical Stimulator design using monophasic spike-exponential waveform was proposed and described in this study. The monophasic square waveform has benefit in generating an action potential, but it could cause side effects such as toxic caused by the electrode polarization. The square waveform signal which the frequency and pulse width could be modulated was manipulated to be the monophasic spike-exponential waveform. Transformer OT240 was applied at the end of the FES system part and functioned as a voltage amplifier and DC signal isolator. On every frequency range between 5– 100 Hz, the 16 peak voltage stages with the lower limit of 45 Volt and an upper limit of 400 Volt was arranged to obtain VRMS value in each stage. Characterization result shows that the produced waveform was monophasic spike-exponential with the narrow pulse width (t1/2 = 7 μ s) and VRMS in the maximum frequency and peak voltage was 8. 99 Volt. This study showed that the designed FES had high VP and low VRMS, thus, it could be concluded that this FES system design could be a candidate for its application.